LPDDR3 Mobile Memory Interposers

LPDDR3 Mobile Memory Interposers


Low power double-data rate third-generation (LPDDR3) mobile memory technologies are developed by the Joint Electronic Devices Engineering Council (JEDEC) for use in handheld devices or applications where low-power and small size is critical.

Nexus Technology offers high quality and high fidelity interposers, enabling the industry to confidently and accurately gain access to LPDDR3 mobile memory buses for debug and compliance verification… 


Packaging/Modules

LPDDR3 mobile memory is available in standard Ball-Grid-Array (BGA) component packages. Standard BGA packages are soldered directly to the printed circuit board (PCB). Interposers are available for component packages detailed below:

  Interposers Options
Oscilloscope MA Instrument
Package (ChxDb) EdgeProbe™ Direct Attach Logic Compliance Riser Component Socket
220 Ball (2×32)  * *  Yes Yes
221 Ball (1×32)  * *  Yes No
216 Ball (2×32)  *  Yes  Yes
178 Ball  *  Yes  Yes
Custom Custom designs are also available. Please contact us.

*If you don’t see what you need, please contact us for the most up to date information.


Attachment Service

Attachment Service

Nexus Technology’s expert attachment service provides a ready-to-go test solution customized to your application. We will attach the interposer and any additional accessories to your application’s target. We can also power-on and test your application to confirm functionality.

Electrical Analysis

Electrical Analysis

Electrical analysis is enabled by using either an EdgeProbe, High Density, or Socketed interposer to capture memory activity on an oscilloscope. The oscilloscope is then used to debug, analyze, and verify the analog characteristics of your design. Presenting an accurate representation of the signals under test to the oscilloscope is critical. Nexus interposers provide an unobtrusive interconnect and accurate signal to your oscilloscope.

Logic / Compliance Analysis

Logic / Compliance Analysis

Logic analysis is performed using a logic / compliance interposer to capture memory activity on a logic or memory analyzer. The logic or memory analyzer is then used to debug, analyze, and verify the logic (basic protocol) of your design. Compliance analysis uses the same interposers to capture activity on a memory analyzer. The memory analyzer is then used to debug, analyze, margin test, performance analyze, and verify the memory protocol.

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